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João Canas Ferreira
Senior Researcher
I received the Ph.D. degree in Electrical and Computer Engineering from the University of Porto (Portugal) in 2001. I 'm currently an assistant professor with the Faculty of Engineering, University of Porto, and a senior researcher at INESC TEC. I'm a member of IEEE, ACM and Euromicro.
My research interests center around the design of dedicated digital systems for complex and demanding embedded applications. I'm particularly interested in three areas:
Some concrete research topics are:
Publications
AN IC ARCHITECTURE FOR BOARD-LEVEL MIXED-SIGNAL TEST SUPPORT
FERREIRA, JC;LEAO, AC;DASILVA, JM;MATOS, JS;
1994
7TH MEDITERRANEAN ELECTROTECHNICAL CONFERENCE, VOLS 1-3
Mixed hardware/software applications on dynamically reconfigurable hardware
Ferreira, JC;Matos, JS;
1998
5th IEEE International Conference on Electronics, Circuits and Systems, ICECS 1998, Surfing the Waves of Science and Technology, Lisbon, Portugal, September 7-10, 1998
From Instruction Traces to Specialized Reconfigurable Arrays
Bispo, J;Cardanha Paulino, NM;Cardoso, JMP;Ferreira, JC;
2011
2011 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2011, Cancun, Mexico, November 30 - December 2, 2011
A routing protocol for WSN based on the implementation of source routing for minimum cost forwarding method
Derogarian, F;Ferreira, JC;Tavares, VMG;
2011
SENSORCOMM 2011 - 5th International Conference on Sensor Technologies and Applications and WSNSCM 2011, 1st International Workshop on Sensor Networks for Supply Chain Management
Supervised Theses
Accelerating the training of convolutional neural network
Afonso de Sá Reis
M - 2019
UP-FEUP
Transparent control flow transfer between CPU and Intel FPGAs
Daniel Miranda Silva Malafaia Granhão
M - 2019
UP-FEUP
Gerador de padrões de vídeo UHD utilizando HDL (Verilog)
Júnio Duarte Lopes Parente
M - 2019
UP-FEUP
Reconfigurable FPGA-Based Baseband Processor for Multi-mode Spectrum Aggregation
Mário Lopes Ferreira
D - 2019
UP-FEUP
